Coherent interconnect

A cache-coherent chip-to-chip or node-to-node link (e.g. NVLink-C2C in Grace-Blackwell, or CXL) that lets a CPU and accelerator share one address space so neither side must explicitly copy data across the boundary.

grounded in: recurring 'spark: 2-node GB10 telemetry refresh' commits — the GB10 (Grace-Blackwell) nodes this system meters are bound by an NVLink-C2C coherent interconnect, the physical basis for their unified CP

Connected concepts

Unified memory inference, GPU interconnect fabric, Memory-bandwidth-bound decode, Zero-Copy, 2-node NVIDIA GB10 (DGX Spark)